Collaboration
Detalle BN6
- Inicio
- Collaboration
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Collaboration
The following agreements have been signed:
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Cadence. Use of Suite of tools for integrated circuit design under the university license modality.
https://www.cadence.com/content/cadence-www/global/en_US/home/services/cadence-academic-network/university-software-program.html -
MOSIS. Use of technology process parameters CMOS 0.5um, 0.35um, 0.18um, 0.13um, under university license modality. Manufacture of chips designed at ITESO.
http://www.mosis.com/ -
CMP-IMAG. Use of technology process parameters CMOS 65m, and 28nm, under university license modality
http://cmp.imag.fr -
Intel. Collaboration agreement for project proposals, so that designers can teach courses and direct projects, and students can do industrial internships
http://www.intel.com/content/www/us/en/jobs/locations/mexico/sites/guadalajara.html -
Freescale. Collaboration agreement for project proposals, so that designers can teach courses and direct projects, and students can do industrial internships.
http://www.freescale.com/webapp/sps/site/overview.jsp?code=MEXICO_UNIVERSITY -
Texas A&M. Student and professor exchange program.
http://engineering.tamu.edu/electrical
ITESO has a specific exchange agreement for students and professors with Texas A&M University, by which students can do short academic stays to share experiences of integrated circuit design and verification with researchers from this University. CONACYT regularly makes offers to finance short academic stays at other universities in the United States and France; students can take advantage of them to broaden their experience in the world of System-on-Chip design.