Technological Scenarios
Detalle BN6
- Inicio
- Technological Scenarios
Technological Scenarios
At the beginning of the program, the design of systems-on-chip implied a significant added value for the microelectronic industry located in the Guadalajara Metropolitan Area (Freescale Semiconductors México and Intel GDC); trends have changed over these last two years, driven by global market shifts.
At the end of 2015, Freescale Semiconductors México, which had proposed the SerDes system-on-chip project to be developed in this specialization, was taken over by NXP, which closed Freescale's integrated circuit design group. The project consisted of designing and characterizing the working blocks of a SerDes system for high-speed communications. The project's main objectives were to design and characterize a basic working SerDes system in order to form human resources capable of dealing with the challenges of designing systems-on-a-chip for high-speed transmission and reception, and with signal-integrity problems and the implementation of testing methods within the system itself to create robust fail-safe systems
In 2016 Continental México opened an integrated circuit design group to develop automotive electronic modules. An agreement is being negotiated between ITESO and Continental within the framework of this specialization in order to continue developing systems-on-a-chip
Given the limits of the technology, the decision was made to scale up the SerDes project to the next node of CMOS technology from Global Foundries, and standard cells from the ARM company. This second version of the SerDes project included the participation of 6 students from the second cohort, 4 part-time professors (designers from Intel-GDC) and 2 full-time ITESO professors as project directors.